T7 DPU Family Accelerates a Wide Range of Storage, Networking, and Security workloads Supported by Modern Storage, Enterprise, and Cloud Applications
Chelsio has announced it's new 7th generation DPU product family, Chelsio Terminator 7 (T7) architected to support and accelerate a wide range of networking, storage and security workloads supported by modern enterprise and cloud datacenter applications. With PCIe 5.0 x16 support, high-speed 400Gbps connectivity, 8 ARM cores (for user), a 400 Gb DPU core and 8 RISC cores (for network, storage and security offloads), ability to integrate with external FPGA, the T7 DPU provides tremendous data compute capability, high-performance, low-latency and low-power generalized solution addressing the challenges, security requirements of hybrid clouds and modern applications like artificial intelligence/machine learning (AI/ML). It supports all the host software of its predecessors, T5 & T6, as-is, thus enabling customers to leverage all prior software investment. The existing T5 & T6 adapters can be replaced with T7 SmartNICs, which provide far more features.
Chelsio introduced T7 DPU ASIC at SmartNICs Summit 2022, highlighting the key features and different variants of T7. The unique ability of T7 to support vast number of features using a single device, single firmware and seamless migration to upcoming speeds of Ethernet will provide high-ROI for customers.
The following are the key features of the T7:
- PCI Express v5.0 x16 host interface, PCI Gen 4 Switch, End Point and/or Root Complex operation
- 1/2.5/10/25/40/50/100/200/400GbE speeds
- Network Offload
- Full TCP stack including IPv4 & IPv6
- UDP Sockets API
- High capacity offload without card memory
- Patented Seamless Failover
- RDMA Offload (iWARP and RoCEv2)
- Storage Offloads
- iSCSI initiator and target mode stack with T10 DIF/DIX support
- NVMe-oF (iWARP or RoCEv2)
- Erasure Code, Dedupe, RAID 5/6
- Block Compression
- Security Offloads
- Inline & co-processor modes for TLS and IPsec
- Inline IPsec & TLS for all Offload Traffic
- Hardware Root of Trust support
- Cloud & Virtualization
- NVMe Virtualization/Emulation
- OVS Offload
- PCI-SIG SR-IOV, 256 VF, 8 PF
- Embedded Processors
- User accessible 8 ARM A72 Cores
- RISC Cores
- 400Gb DPU Core
T7 DPU family comprises of the below variants:
- T7ASIC - 31mm package, full suite of features, with optional external memories for SmartNICs.
- D7ASIC - 21mm package, full suite of features, without requiring external memories for Computational Storage.
- S7ASIC - 21mm package, server offload features, without requiring external memories for generic servers.
For more information, pricing and support, contact EPS here.