home products Semiconductors GOWIN GW1NS-2 Family with embeded ARM Core
GW1NS-2 Family with embeded ARM Core
GW1NS-2

GW1NS-2 Family with embeded ARM Core

Quantity breaks available. View Pricing Table

Pricing Table

Based on 55nm LP technology, LittleBee® family offers instant-on, non-volatile, low power, intensive I/O and small footprint FPGA (smallest as 2.4x2.3mm). The family is ideal for high-performance bridging application and the first FPGA supports MIPI I3C and MIPI D-PHY standard in the industry. The LittleBee® family is also the first non-volatile FPGA with an embedded pSRAM in the industry, which further reduces the board space

Product Detail

Lower Power Consumption

  • 55nm embedded flash technology
  • LV: supports 1.2V core voltage
  • UV: built-in linear regulator, supports1.8V, 2.5V, and 3.3V core voltage input
  • Clock dynamically turning on/ turning off

Multiple I/O Standards

  • LVCMOS33/25/18/15/12; LVTTL33, SSTL33/25/18 I, SSTL33/25/18 II, SSTL15; HSTL18 I, HSTL18 II, HSTL15 I; PCI, LVDS25, RSDS, LVDS25E, BLVDSE, MLVDSE, LVPECLE, RSDSE
  • Input hysteresis option
  • Supports 4mA,8mA,16mA,24mA,etc. drive options
  • Slew Rate option
  • Output drive strength option
  • Individual Bus Keeper, Weak Pull-up, Weak Pull-down, and Open Drain option
  • Hot Socket

High Performance DSP

  • High performance digital signal processing ability
  • Supports 9 x 9,18 x 18,36 x 36bit multiplier and 54bit accumulator;
  • Multipliers cascading
  • Registers pipeline and bypass
  • Adaptive filtering through signal feedback
  • Supports barrel shifter

Abundant Slices

  • 4 input LUT (LUT4)
  • Double-edge flip-flops
  • Supports shift register and distributed register

Block SRAM with Multiple Modes

  • Supports Dual Port, Single Port, and Semi Dual Port
  • Supports bytes write enable

Flexible PLLs+DLLs

  • Frequency adjustment (multiply and division) and phase adjustment
  • Supports global clock

Built-in Flash Programming

  • Instant-on
  • Supports security bit operation
  • Supports AUTO BOOT and DUAL BOOT

Configuration

  • JTAG configuration
  • Up to 6 GowinCONFIG configuration modes: AUTOBOOT, SSPI, MSPI, CPU, SERIAL, DUAL BOOT
Package Pitch(mm) Size(mm) GW1NS-2
CS36 0.4 2.5 x 2.5 30(6) 
QN32 0.5 5 x 5 25(4) 
QN32U 0.5 5 x 5  16(2)
QN48 0.4 6 x 6 38(7)
LQ144 0.5 22 x 22  95(12)

GW1NS-2 Family with embeded ARM Core
https://www.epsglobal.com/Media-Library/EPSGlobal/Products/files/gowin.jpg?ext=.jpg&maxsidesize=400

Based on 55nm LP technology, LittleBee® family offers instant-on, non-volatile, low power, intensive I/O and small footprint FPGA (smallest as 2.4x2.3mm). The family is ideal for high-performance bridging application and the first FPGA supports MIPI I3C and MIPI D-PHY standard in the industry. The LittleBee® family is also the first non-volatile FPGA with an embedded pSRAM in the industry, which further reduces the board space

GW1NS-2
New
GW1NS-2
https://www.epsglobal.com/getmetafile/

Pricing Table

Technical Specification

LUT4:
1728
Flip-Flop (FF):
1296
Max. User I/O:
95
Core Voltage:
1.2V
PLLs + DLLs:
1 + 2
User Flash (bits):
1M
B-SRAM bits:
72K
B-SRAM quantity:
4
S-SRAM bits:
4608
Embedded Memory pSRAM (Mb):
32
OSC:
1,+/- 5% accuracy
Hard Core Processor:
Cortex-M3
USB PHY:
USB2.0 PHY
ADC Channels:
1
I/O Banks:
4

Additional Documentation

Need Help?

We have local language and currency support in each of our 28 locations, ensuring you always have access to friendly customer support to deliver your hardware solutions regardless of your location.

Request a callback from our experts