Low Skew, Low Additive Jitter 10 output LVPECL/LVDS/HCSL Fanout Buffer with one LVCMOS output

Product Detail

Microsemi’s miSmartBuffer ZL40230/235/240 Family of devices give the ability to create multiple copies of a clock signal and distribute them among several loads with minimal additive jitter. The miSmartBuffer ZL40230/235/240 family of devices are synergistic with Microsemi® industry-leading timing portfolio and when combined can create a complete clock tree, replacing a number of multipliers, synthesizers, and oscillators on the board, improving design reliability while reducing BOM costs and simplifying design.